firsttimedesigning said:Thank you for the replying...
Does anyone know what is the unit capacitance of a 12 bit successive approximation ADC?
Are the capacitors that people use in a 12 bit SA-ADC the same as
the ones they use in pipeline ADC?
raj_shekar said:Statistically Random error in capacitor ratio has been observed to be depends on inverse square root depends on the capacitor-area. and linear dependance on permiter-to-area ratio.
These are the common rules to be followed to get better matching:
Use identical geometries
- Different sizes of capacitors match poorly
Use square geometries for precisely matched capacitors
- Peripheral variations are major source of random mismatch
- Lowest periphery to area ratio
Make capacitors as large as possible
- Optimum size between 20 x 20 to 50 x 50 um
Place matched capacitors adjacent to one another
- Large number of capacitors should be placed into rectangular arrays
Place dummy capacitors around outer edge of array
- Dummy capacitors will shield matched capacitors from lateral electrostatic
fields and eliminate variations in etchrates
Electrostatic shield matched capacitors
- Contains fringing fields
- Allows leads to go over capacitors
- Shields capacitors for electrostatic fields
- Reduces effects of packaging stress
Cross couple arrayed capacitors
- Minimizes the effects of oxide gradients
Consider capacitance of leads
- Leads will contribute to capacitance
Avoid running leads over unshielded capacitors
Look at the attachment for better statistical data.
firsttimedesigning said:I have been trying find some information on what cause capacitor mismatch,
so far the only thing that I know is that there is a random edge variation. Other possible causes such as undercut, long range gradients. They all can be eliminated using common centroid geometry. What I would like to know though is that how much effect does random edge variation on the capacitor ratio? And why do people say it is easier to match two big capacitors rather than two small capacitors? Is it because the random edge variation depends on the size of the capacitor. The random edge variation probably differs from technology to technology. But can anyone give me a general value? like an average value or something.
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