Capacitive Load and Linearity

[GSarris]

Hello,
I want to design an opamp that drives a capacitive load (1-2pF) with unity gain and i would like to get good linearity performance. I had some discussions with a friend and told me that as soon as my GBW should be relatively high (200MHz) in order to achieve good linearity it would be better to drive it with a current signal because when you drive a capacitor with current at high frequencies, the linearity is better. I didn't understand it very well can anybody please elaborate?

 

[crutschow]

Are you sure you mean 1-2pF? That's less than stray wiring capacitance.

What is the highest frequency of your signal?

 

[GSarris]

Actually the signal is 200MHz, it is a track amplifier for a time interleaved ADC. I made a mistake, i want unity closed loop gain until 200MHz. Capacitive load is to be optimized for noise but we started from 1pF. My process is a 0.18um CMOS . yes the load is like this (not necessarily a realistic case). It is for an educational purpose, so many things are unrealistic in this assignment.