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parasitic crystal is an inadequate term, I would say additional resonance from capacitors parasitic inductivity. However, the simulation setup is rather unrealistic. To achieve the parameters, you have to use leaded capacitors with maybe 10 mm long legs and a very fast inverter that has sufficient gain at this frequency, unlikely but not impossible at all.
why the setup condition is unrealistic? My C1 C2 are off-chip capacitors. Their ESL and ESR may be not significant , but parasitc factors from PCB become unneglectable. Total parasitc inductance easily reaches 10nH . The Q of this addtional resonance is not high , but it is also troublesome when it pushes loop gain up to above unity again at high requency.
1. We have a 2 sided PCB without any power planes or even a breadboard. Then the said 10 nH could be easily reached. But in this technology, you won't find a fast CMOS inverter, that could oscillate at 500 MHz.
2. Have a multilayer PCB with power planes, as used for fast digital circuits, and SMD capacitors. In this technology, you could find perhaps an unbuffered inverter, that has sufficient gain at 500 MHz. But then, parasitic inductances shouldn't be expected above 1 nH for a capacitor. That's why I think the setup is unrealistic. If you like however, you can artificially introduce extra trace inductance, hopefully the oscillator could work then...
Thanks . As you said, unbuffered simple CMOS Inverter is employed to realize negative resistor. can you give some simulation kits when encountering such issues. In you opinion, ESL is not such large that reaching 10nH, ESR is below 0.5ohm. Maybe it can make oscillator work in some cases or corners . But i stll think such estimation take some risk. Do you have some good ideas or experience to share with me ?
my opinion in this field comes mainly from empirical knowledge as a circuit designer. I didn't see yet a necessity for simulation of this particular effect. Basically I have to avoid parasitic oscillation when designing a crystal oscillator with given parameters and available parts, if this could be easily achieved, as I think, there is no need to consider how the design could possibly fail. If a crystal itself is supposed to oscillate at unwanted modes (overtones), it is normally sufficient to add a series resistor at the inverter output, as typically done with low frequency watch crystals.
It can be an instructive example in analog design anyway, but more in a general sense.
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