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Can somebody tell me how to generate sdc file?

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ksrinivasan

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SDC file

Guys

Iam working with soc encounter. Iam aware that sdc is synopsys design constraint file
Can somebody tell me how to generate sdc file. I need to give this as input to the RTL Compiler
Is there any tool or manual which can help mw in this regard

Srinivasan
 

SDC file

Hi Srinivasan

the RTL compiler which is a synthesis tool shld generate this sdc file.
During synthesis all teh timing constraints will be used to generate an sdc file.
Try finding how to write out an SDC file using RTL compiler. give some very basic timing constraints like max delay, min delay, max capacitance for RTL compiler.

SING
 

Re: SDC file

Found out this
gave a small sdc file as input to soc encounter along with other input files
soc encounter itself generated another sdc file .
This sdc file + verilog netlist generated schematics
 

SDC file

soc encounter can dump sdc file,
try with some thing like dump_sdc or write_sdc,
 

Re: SDC file

Hi,

use the commands below

writeTimingCon -filePrefix ${TOPNAME} -sdc

ksrinivasan said:
Guys

Iam working with soc encounter. Iam aware that sdc is synopsys design constraint file
Can somebody tell me how to generate sdc file. I need to give this as input to the RTL Compiler
Is there any tool or manual which can help mw in this regard

Srinivasan
 

Where should i type these commands
In the terminal of encounter ???
 

yep load the design in to encounter and then type in the encounter terminal
 

yes, this is the SOC Encounter commands for writing out the sdc file you need.

If you do not have a "TOPNAME" variable define, simply ignore the -filePrefix ${TOPNAME}, you will find the sdc file in the dir where you invoke Encounter.
 

its only file prefix,, i hope we can give any name along with it,, encounter will dump out the sdc file with the specified name
 

Re: SDC file

You can type command in dc_shell:
write_sdc your_file.sdc
 

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