dw_man
Junior Member level 3
In IC Compoielr, can block abstraction models and ILMs be used to instantiate multiple instances of a design that has already been routed? Or do these only relate to interface logic.
I have a small routed design which has been synthesized from VHDL. How can I create an array of these and make sure they are all linked?
I have a small routed design which has been synthesized from VHDL. How can I create an array of these and make sure they are all linked?