Welcome to EDAboard.com

Welcome to our site! EDAboard.com is an international Electronics Discussion Forum focused on EDA software, circuits, schematics, books, theory, papers, asic, pld, 8051, DSP, Network, RF, Analog Design, PCB, Service Manuals... and a whole lot more! To participate you need to register. Registration is free. Click here to register now.

calculation of sigma-delta fractional-N PLL

Status
Not open for further replies.

niklas.zhu

Newbie level 6
Joined
Jan 4, 2006
Messages
11
Helped
0
Reputation
0
Reaction score
0
Trophy points
1,281
Activity points
1,362
assume fractional-N PLL using sigma-delta architecture of MASH 1-1-1 and it is for GSM application (channel bandwidth 200kHz )

since MASH 1-1-1 output from -4 to 3, the integer divided number is C, and the output frequency of VCO is Fout (assume Fout is 960MHz)

Is (Fout/(C-4) - Fout/(C+3))/C the VCO output frequency shift?

since the frequency shift should less than 200kHz*x (x<1), assume x=0.01,
so C should be large than 170 and then reference frequency cannot be 26MHz

do I calculate correct?
 

rfsystem

Advanced Member level 3
Joined
Feb 25, 2002
Messages
914
Helped
148
Reputation
292
Reaction score
38
Trophy points
1,308
Location
Germany
Activity points
9,550
Please use a little bit Math notation:

If the Mash generate the number interval {-4...3} (3bit signed)

and the divider is modulated with that output by {C-4...C+3} the output frequency is

FOUT=FREF*{C-4...C+3}={FREF*(C-4)...FREF*(C+3)}

The advanatge is that the total of 8 numbers could approach an gaussian distribution. So spurs could be very low.
 

Status
Not open for further replies.

Part and Inventory Search

Welcome to EDABoard.com

Sponsor

Top