Specific resistance of power devices is very often given in these strange units of r=mOhm*mm2 so that people can quickly estimate device area A for the required Rdson value:
Rdson = r / A
A more fundamental parameter is specific resistance of the device in Ohms per one micron of gate width - rch.
If you have SPICE model of the device, rch can be calculated as follows from simple DC SPICE simulation corresponding to operating point (Vds, Vgs):
rch=Vds/Ids*W,
where W is the gate width.
Areal specific device resistance r is related to the device linear specific resistance rch as follows:
rch=r*P
where P is the device pitch (period in the direction perpendicular to the poly gate, for multi-finger devices).
Some people/fabs do, some do not include the well tap area into account when calculating the pitch and areal device resistivity.
Also, as "checkmate" noted, these calculations give you just an estimate of the device Rdson, or lower bound for Rdson - you will need to add metallization resistance for source/drain nets, which can contribute a significant resistance value to the total Rdson (device + interconnect).
See this paper for more info on metallization resistance calculation (as well as for current density analysis, metal/via/wirebond layout optimization, sense device optimization, etc.):
https://www.siliconfrontline.com/fi...d_National_Semiconductor_ISPSD-2010_LV-P4.pdf
Max
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