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Cadence Verilog-XL path and permission problem

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njabbour

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HI,

I am facing many problems while openening VERILOG-XL in CADENCE.If i am going to V-XL through schematic (as tool-simulation-verilog-xl-setup enironment-run directory(ex:mos.run1)) after setup env's ok ,its showing the error as "INVALID VERILOG EXECUTABLE VERILOG,Please check existance and for permissions and try again,relative path names are relative run directory"...If i clsose the simulation option warning then verilog-xl window is opening.

How can i solve it?

Thanks in advance...
 

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