cadence tool implementation

[vnkt107]

how to put a cmos circuit in standby mode in order to measure standby power in cadence tool??

 

[graphene]

i think the standby power can be measured as such by RTL Compiler if it is in digital domain.
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or if its using Virtuoso - Analog...
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1) Calculate total power drawn from VDD * Current over time
2) estimate average power at the op load and average it. Cl*f*VDD°2
3) chk the current at Drains of the CMOS *VDD and average it for Shortc circuit currents. (If u r using Virtuoso you can use clip function for specific ranges in ADE envoronment .)
Hence,
4) Pstandyby = Ptotal - Pdyanamic - Pshort-circuit.
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did this answer your Qn ?