Continue to Site

Welcome to EDAboard.com

Welcome to our site! EDAboard.com is an international Electronics Discussion Forum focused on EDA software, circuits, schematics, books, theory, papers, asic, pld, 8051, DSP, Network, RF, Analog Design, PCB, Service Manuals... and a whole lot more! To participate you need to register. Registration is free. Click here to register now.

c54 memory map problem

Status
Not open for further replies.
A

ahmadagha23

Guest
fopen _lock c54

hi
I have wroten a source code for c54cst but the size of my code is so big that it need more than one memory page for some of its section. I could not provide a proper .cmd file for it. Although I read the c54cst datasheet I couldn't understand the values for OVLY and MP/MC and other memory registers and .cmd file and memory region to use external memory. I attached the .map file of my project could you please write a .cmd file and values of OVLY and mp/mc bits for me? what is the required modifications in gel and other files?

Please help me.
regards

Added after 6 minutes:

it is my .map file for 54cst could any one write a .cmd file for it?



******************************************************************************
TMS320C54x COFF Linker PC v4.1.0
******************************************************************************
>> Linked Tue Dec 11 19:43:12 2007

OUTPUT FILE NAME: <./Debug/sound.out>
ENTRY POINT SYMBOL: "_c_int00" address: 0002d00f


MEMORY CONFIGURATION

name origin length used attr fill
---------------------- -------- --------- -------- ---- --------
VECT 00007f80 00000080 00000000 RWIX
TEXT 00020500 0000f394 0000ee11 RWIX
AB 00031000 00010000 0000fdb7 RWIX
CINT 00050080 00007f16 00007f15 RWIX


SECTION ALLOCATION MAP

output attributes/
section page origin length input sections
-------- ---- ---------- ---------- ----------------
.vectors 0 00007f80 00000000 UNINITIALIZED

.text 0 00020500 0000ee11
00020500 000007f6 classify.obj (.text)
00020cf6 00000787 dsp_sub.obj (.text)
0002147d 00000602 fec_code.obj (.text)
00021a7f 0000073f fft_lib.obj (.text)
000221be 00000346 fs_lib.obj (.text)
00022504 000004a6 harm.obj (.text)
000229aa 00000c72 lpc_lib.obj (.text)
0002361c 000002cb mat_lib.obj (.text)
000238e7 00000478 math_lib.obj (.text)
00023d5f 00000024 mathdp31.obj (.text)
00023d83 00000839 mathhalf.obj (.text)
000245bc 00001095 sound_ana.obj (.text)
00025651 00001e59 sound_chn.obj (.text)
000274aa 00000894 sound_sub.obj (.text)
00027d3e 000006b6 sound_syn.obj (.text)
000283f4 0000006e sounde_Decode.obj (.text)
00028462 00000081 sounde_Encode.obj (.text)
000284e3 00001b4a npp.obj (.text)
0002a02d 000007c4 pit_lib.obj (.text)
0002a7f1 00000a5b pitch.obj (.text)
0002b24c 000004cc postfilt.obj (.text)
0002b718 000011eb qnt12.obj (.text)
0002c903 00000123 test1.obj (.text)
0002ca26 000005c4 vq_lib.obj (.text)
0002cfea 00000025 rts.lib : assert.obj (.text)
0002d00f 0000004a : boot.obj (.text)
0002d059 00000052 : exit.obj (.text)
0002d0ab 0000009f : f_add.obj (.text)
0002d14a 00000020 : f_cmp.obj (.text)
0002d16a 00000001 : f_error.obj (.text)
0002d16b 0000004b : f_ftol.obj (.text)
0002d1b6 0000002b : f_itof.obj (.text)
0002d1e1 0000002a : f_ltof.obj (.text)
0002d20b 00000073 : f_mul.obj (.text)
0002d27e 00000005 : f_neg.obj (.text)
0002d283 00000009 : f_sub.obj (.text)
0002d28c 00000050 : fclose.obj (.text)
0002d2dc 0000000a : feof.obj (.text)
0002d2e6 00000075 : fflush.obj (.text)
0002d35b 0000001c : floor.obj (.text)
0002d377 00000151 : fopen.obj (.text)
0002d4c8 00000030 : fprintf.obj (.text)
0002d4f8 0000006c : fputc.obj (.text)
0002d564 000000fa : fputs.obj (.text)
0002d65e 000000b1 : fread.obj (.text)
0002d70f 0000014c : fwrite.obj (.text)
0002d85b 000000a5 : ldiv.obj (.text)
0002d900 00000326 : lowlev.obj (.text)
0002dc26 0000000c : lsl.obj (.text)
0002dc32 00000011 : lsrs.obj (.text)
0002dc43 0000000e : memcpy.obj (.text)
0002dc51 00000274 : memory.obj (.text)
0002dec5 0000003d : modf.obj (.text)
0002df02 00000005 : remove.obj (.text)
0002df07 000002b7 : trgdrv.obj (.text)
0002e1be 0000000c : udiv.obj (.text)
0002e1ca 0000005c : _bufread.obj (.text)
0002e226 0000009f : _io_perm.obj (.text)
0002e2c5 00000007 : _lock.obj (.text)
0002e2cc 00000b02 : _printfi.obj (.text)
0002edce 00000059 : atoi.obj (.text)
0002ee27 00000102 : ecvt.obj (.text)
0002ef29 0000009a : f_div.obj (.text)
0002efc3 0000003c : f_ftoi.obj (.text)
0002efff 000000fc : fcvt.obj (.text)
0002f0fb 0000003c : fseek.obj (.text)
0002f137 000000aa : ldmsg.obj (.text)
0002f1e1 00000014 : lmpy.obj (.text)
0002f1f5 00000049 : ltoa.obj (.text)
0002f23e 00000020 : memccpy.obj (.text)
0002f25e 0000002c : memmov.obj (.text)
0002f28a 00000087 : setvbuf.obj (.text)

.bss 0 00031000 0000b65b UNINITIALIZED
00031000 00001e93 npp.obj (.bss)
00032e94 00000445 global.obj (.bss)
000332da 00000002 dsp_sub.obj (.bss)
000332dc 00007d63 qnt12_cb.obj (.bss)
0003b03f 00000311 sound_sub.obj (.bss)
0003b350 00000272 sound_ana.obj (.bss)
0003b5c2 00000203 lpc_lib.obj (.bss)
0003b7c5 00000200 fft_lib.obj (.bss)
0003b9c5 000001cd rts.lib : defs.obj (.bss)
0003bb92 000001b9 pitch.obj (.bss)
0003bd4b 0000019b sound_syn.obj (.bss)
0003bee6 00000190 rts.lib : _printfi.obj (.bss)
0003c076 00000158 pit_lib.obj (.bss)
0003c1ce 000000d0 rts.lib : trgdrv.obj (.bss)
0003c29e 000000c6 sound_chn.obj (.bss)
0003c364 000000a0 fs_lib.obj (.bss)
0003c404 0000008b classify.obj (.bss)
0003c48f 00000064 rts.lib : fcvt.obj (.bss)
0003c4f3 00000064 : ecvt.obj (.bss)
0003c557 0000005c : lowlev.obj (.bss)
0003c5b3 0000004b postfilt.obj (.bss)
0003c5fe 00000023 rts.lib : exit.obj (.bss)
0003c621 0000001c fec_code.obj (.bss)
0003c63d 00000019 qnt12.obj (.bss)
0003c656 00000003 rts.lib : memory.obj (.bss)
0003c659 00000002 : _lock.obj (.bss)

.const 0 0003c65c 0000323c
0003c65c 0000003e fs_lib.obj (.const)
0003c69a 00000038 mathhalf.obj (.const)
0003c6d2 00000034 rts.lib : _printfi.obj (.const)
0003c706 00000026 classify.obj (.const)
0003c72c 00000008 pitch.obj (.const)
0003c734 00000008 rts.lib : ecvt.obj (.const)
0003c73c 00000008 : fcvt.obj (.const)
0003c744 00000004 : floor.obj (.const)
0003c748 00000002 : modf.obj (.const)
0003c74a 0000190a msvq_cb.obj (.const)
0003e054 00000a00 fsvq_cb.obj (.const)
0003ea54 000004a4 fec_code.obj (.const)
0003eef8 0000038a math_lib.obj (.const)
0003f282 00000228 coeff.obj (.const)
0003f4aa 00000120 npp.obj (.const)
0003f5ca 00000101 rts.lib : ctype.obj (.const)
0003f6cb 00000076 test1.obj (.const)
0003f741 00000070 mat_lib.obj (.const)
0003f7b1 0000006a lpc_lib.obj (.const)
0003f81b 00000032 qnt12.obj (.const)
0003f84d 00000012 sound_sub.obj (.const)
0003f85f 00000010 postfilt.obj (.const)
0003f86f 00000010 harm.obj (.const)
0003f87f 0000000c sound_chn.obj (.const)
0003f88b 00000008 global.obj (.const)
0003f893 00000003 rts.lib : assert.obj (.const)
0003f896 00000002 : fputs.obj (.const)

.sysmem 0 0003f898 00001000 UNINITIALIZED

.stack 0 00040898 00000400 UNINITIALIZED

.cio 0 00040d00 00000120 UNINITIALIZED
00040d00 00000120 rts.lib : ldmsg.obj (.cio)

.cinit 0 00050080 00007f15
00050080 00000003 classify.obj (.cinit)
00050083 00000004 dsp_sub.obj (.cinit)
00050087 00000007 global.obj (.cinit)
0005008e 00000003 lpc_lib.obj (.cinit)
00050091 00000009 sound_ana.obj (.cinit)
0005009a 00000041 sound_chn.obj (.cinit)
000500db 0000000c sound_sub.obj (.cinit)
000500e7 00000009 sound_syn.obj (.cinit)
000500f0 00000015 npp.obj (.cinit)
00050105 00000006 pit_lib.obj (.cinit)
0005010b 00000003 pitch.obj (.cinit)
0005010e 00000039 postfilt.obj (.cinit)
00050147 0000000f qnt12.obj (.cinit)
00050156 00007d7d qnt12_cb.obj (.cinit)
00057ed3 00000091 rts.lib : defs.obj (.cinit)
00057f64 00000009 : exit.obj (.cinit)
00057f6d 0000001e : lowlev.obj (.cinit)
00057f8b 00000003 : memory.obj (.cinit)
00057f8e 00000006 : _lock.obj (.cinit)
00057f94 00000001 --HOLE-- [fill = 0]

.data 1 00000000 00000000 UNINITIALIZED
 

Hello ahmadagha23

I don't know the c54, however I faced the same problem with C6x devices: for these devices the linker lets you specify (writing a suitable linker command file) the RUN and LOAD addresses for all code sections: the RUN address is the memory area where the code/data is placed during the sw execution (usually is fast internal ram), while the LOAD address is where the code is stored (e.g. external EEPROM) before its execution. This information is processed by the linker, which uses it to generate the COPY TABLES that shall be used at run time to manage the paging of the SW and load the executable code or data in internal ram only when it is needed. A COPY TABLE defines the source address (in ROM) the destination address (in RAM) and the length of the section to be copied at run time. The linker generates this information for each section, then the hex converter processes it and generates a ROM-able executable file (.hex) which stores this tables, then is up to the programmer to manage the paging of the SW at run time (the process of copying from external to internal memory the pieces of executable code prior their execution) according to the information stored in the COPY TABLES.
With this technique different sections could share the same RUN memory area, being previously allocated on separate external LOAD areas: that is the memory OVERLAY concept.
I suggest you to check in the linker documentation to find the necessary information to apply this technique to your software.
Regards

Mowgli
 

Dear friend;
Thanks for your reply; but my problem is that when the size of a program or section is more than one memory page how can I set its load and run address in cmd file?
In other words if a program (only a .c program in a project) was near to 120K how can I set its address specially RUN time address?

Do you know the required settings and consideration for using external memory?
Regards
 

In my past message I tried to do only a short summary about the COPY TABLE functionality, but maybe it was too short and little helpful for you.
A more detailed explanation about this technique and the linker directives to be used to implement it in the linker command file (.cmd) could be found in the
SPRAA46 "Advanced Linker Techniques for Convenient and Efficient Memory Usage"
that you can freely download from www.ti.com web site.
Before reading the SPRAA spent some time reading the linker documents provided by TI with the development environment. I am confident that the answer to your problem could be found reading these documents.

Regards

Mowgli
 

Dear friend
thanks for your reply.
I read documents but:
1- section split is support only through one page and not for more than one pages. isn't it?

2- I use 54cst simulator. How can I find the amount of memory which simulator support? Can I extend the amount of memory of supported by simulator?
I add memory by adding map-add() in gel file and the context of the added area (viewed by memory view tool) converted from dash"-" to 0x000. but it could not be accessed by loader through load operation.Is there any way to add required mem to simulator?

regards
 

Status
Not open for further replies.

Similar threads

Part and Inventory Search

Welcome to EDABoard.com

Sponsor

Back
Top