Bump linearization technique

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student14

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Hello

Can some one help me in understanding the bump linearization technique. How it improves linearity. I have the figure attached. It says it linearizes the OTA but I cant understand how. Its says near the origion it linearizes the transfer characteristics

 

The center branch with two transistor B. They are used for linearity improvement. Working of this transistor I cannot understand.
 

I see many papers explaining bump linearization in detail. You may also visualize it's working in a simulation.

To give the basic idea, a differential pair has highest gain with zero input, the bump circuit reduces it by drawing off more bias current from the pair in the origin and less with rising input differential voltage.
 

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