Hello EDA fellows,
I would like to ask your advises about any buffer architecture that can drive/provide clock for a very large capacitor (1uF).I tried to use taper buffer but it's extremely big (the MOS width reaches 20,000 already)...
Thank you.
Well, you're not going to get away from a big device if you want to drive
a big cap.
However you do want to play with anti-shoot-through when you get to
monstrous drivers.
Why there is a 1uF load on anything called a "clock", I couldn't imagine.
If it is many parallel loads then distributing predrivers could make
sense for several reasons.