Biasing of high voltage CMOS transistors in mixed signal application

[rissenaj]

Hi all,

I am planning to use high voltage transistors from XFAB XH035 process for a biomedical application. Output drive required is 18V and I am planning to use 18V drain NMOS and PMOS transistors with maximum rated Vgs and Vds of 18V for my application(Please see the attached pic).

My question is whether I can bias the HV-NMOS and HV-PMOS transistors correctly with a 3.3 V CMOS as my low to high voltage level shifter design is a stacked design using low voltage MOSFET devices and the low and high voltage control signals (applied to high voltage devices) switch between 0 to 3.3 and 14.7 to 18V.

 

[erikl]

I think you can do this, however you should check for which VGS the given values for IDS and RON are valid - as a max. |VGS| of 18V is permitted.

Analyse and check the output characteristics with VGS as parameter!

 

[rissenaj]

Thanks erikl.