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bias polarity on gate oxide breakdown

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t2000_wong

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For CMOS technology , is there a difference on gate oxide breakdown voltage by applying positive and negative bias ongate (n+poly)? (N+S/D, B is ground)
 

Gate oxide breakdown voltage depends only on the thickness of the gate oxide (and on its quality). It doesn't depend on the direction of the electric field, just the absolute sum of voltages is decisive.
 

I think there could be, if you have second order things like
gate poly depletion in play then the field will be divided
across the depletion region and the oxide. The depletion,
hence the "shielding", will be voltage-asymmetric. This
comes down to cases, not theories; in the end and nothing
should be assumed when you are setting up a qualification
or destructive-limits exercise.

Breakdown also tends to proceed from some defect and
percolation, expanding a channel over short time to make
a conductive path or rupture if the current is high enough.
This percolation can and usually is enhanced by some
local defect (think of field emission and curvature, how a
point-emitter throws more corona discharge than a sphere,
than an infinite flat plate). Now you may not know which
face of the gate ox contains more defectivity and local
field enhancing features, but it seems you should not
discount the possibility (likelihood) that the two plates
are different, asymmetric.

Last, doping uptake and implant damage to the oxide
is a potential actor and potentially asymmetric. You
might find that holes are preferentially injected at one
face or the other, to bumble on through the china shop,
and see this roll up to a volt or two of breakdown
asymmetry.

Again, all theories and anecdotes, which want real and
unassuming checking on the material at hand.
 

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