BFM Bus Functional Model

[balu304]

Hi
I am looking for a BFM for simple,generic processor.I am very much new for writing BFM.Any inputs are welcome.Actually, whether BFM can be written systemverilog also.What is the preferred choice?We have our designs in systemverilog.I want to see the example codes for BFM for any module.

 

[ljxpjpjljx]

currently , we can use SV to create a BFM more quickly!