Hi,
Seems weird. Are you sure it majes sense?
How do you ensure data integrity...I mean ... sometimes you need to read the contents.how do you ensure that at exactely this time the data is valid?
***
Back to your problem.
If block_write_cycle_time > block_count x RAM_access_time
Then each block may write it's data in a single stage buffer (containing RAM address and data) and a FSM performs the sequential write from buffer to RAM.
6 x (block + buffer) --> FSM --> RAM
Klaus