Behavioral simulation??????

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behavioral simulation

Is it normal that in behavioral simulation, with first clock the output is not correct and then with the second clock it is? How big of a deal is it for burning on fpga?
 

very very good question. an fpga expert told me that xilinx fpga takes around 70ps to run as expected. So if the first valid output is not during first clock cycle, it is absolutely OK. I think the first output is all zeros because fpga is initialized in this state.

Hope it helps.
 

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