ashwini jayaraman
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Hi,
I tried wring a behavioral description of two-to-one-line multiplexer.While writing its rtl code, I mentioned the target output as reg.
In its testbench, how should I declare o/p and i/p??
In other 2 types of modeling, we used to declare, wire for an o/p and reg for an i/p.
I did the same for this also. My compilation is successful ,but I am not getting the anticipated o/p.
Here is the code below:
1.RTL:
module mux_2x1_behave(y,a,b,s);
output y;
input a,b,s;
reg y;
always @(a or b or s)
if(s==1)y=b;
else y=a;
endmodule
2. testbench:
module tb_mux_2x1_behave;
wire y;
reg a,b,s;
mux_2x1_behave M1(y,a,b,s);
initial
begin
#10 s=1;a=0;b=0;
#30 s=0;a=0;b=1;
#50 s=1;a=1;b=0;
#100 s=0;a=1;b=1;
#1;
end
endmodule
I am getting y=0 for all the inputs except for the last input. Plz do help me out.
Thanks.
I tried wring a behavioral description of two-to-one-line multiplexer.While writing its rtl code, I mentioned the target output as reg.
In its testbench, how should I declare o/p and i/p??
In other 2 types of modeling, we used to declare, wire for an o/p and reg for an i/p.
I did the same for this also. My compilation is successful ,but I am not getting the anticipated o/p.
Here is the code below:
1.RTL:
module mux_2x1_behave(y,a,b,s);
output y;
input a,b,s;
reg y;
always @(a or b or s)
if(s==1)y=b;
else y=a;
endmodule
2. testbench:
module tb_mux_2x1_behave;
wire y;
reg a,b,s;
mux_2x1_behave M1(y,a,b,s);
initial
begin
#10 s=1;a=0;b=0;
#30 s=0;a=0;b=1;
#50 s=1;a=1;b=0;
#100 s=0;a=1;b=1;
#1;
end
endmodule
I am getting y=0 for all the inputs except for the last input. Plz do help me out.
Thanks.