CPLD for me?
Salam,
SOP = Sum Of product.
You can implement any logic circuit by draw it's truth table then from the truth table you can find equation for the o/p using AND & OR gates only.
CPLD uses these tech. It uses programmable AND & OR Gates array.
Note: this in simple, but actually it the Logic Cell contain Flip-Flops and MUX for handle all logic modes.
But FPGA architecture based on LUT (Look Up Table) , the number of i/p to LUT is 4 and the o/p is 1
so you can directly transfer a 4*1 truth table without using programmble AND or OR array gates.
Buy using many of LUTs units you can implement any complex logic desgin.
You Can use LUT as 16*1 RAM Block.
Bye