Hi friends;
Ihave designed 3 bandgaps @ 1.5 2.1 and 0.9V; they give good result lonly, BUT when i connect them to the ADC they générate Ripples and variation.
I have used a 10p like filtre at the output and ihave this simulation:
what i should do to obtain a good SNR
I think ADC's noise kicks back in to your reference. Design a low impedance Buffer for the reference. Just verify it first with a vcvs and a output resistor. This should give your output resistance spec for the buffer as well.
Thinks Saro,
goood solution but simulation still presents ripples
But when i increase the cap of filtre for isolation at high values (100p, 1nF) i find good results
now i think that i will have problem of implementation...
what should i do?
thx in advance
regards
Did you design a buffer or managed with a large cap at the BG output?
As you generate BGR by running BG current in to the resistor, the impedance is not going to be low., and any noise from the subsequent section can alter the voltage appreciably. You can spend a fraction of that cap area in trying to achieve a low output impedance, low noise, stable buffer to get good results.