Hi ass-ee,
Thanks for your reply...
These signals are capture from hardware through ILA debug core, like chipscope. So because of sampling frequency, it doesn't show correct duty cycle otherwise I have generated this clock from MMCM only.
The interesting thing is, the same interface works with Tri-MAC core's AXI interface. It reads the register successfully. The core connections are also ok because it transfers data correctly. Only the problem is with AXI interface of 10G MAC core.
Thanks