Aug 23, 2013 #1 E eeStud Member level 1 Joined Feb 17, 2011 Messages 37 Helped 0 Reputation 0 Reaction score 0 Trophy points 1,286 Activity points 1,527 Hi, I am getting some DRC violations in my design regarding the I/O pads: 1. NS width for NMOS drain >= ... 2. NS width for drain >= ... Any idea what should i check? or how can i fix this? Thanks.
Hi, I am getting some DRC violations in my design regarding the I/O pads: 1. NS width for NMOS drain >= ... 2. NS width for drain >= ... Any idea what should i check? or how can i fix this? Thanks.