eeStud
Member level 1
Hi,
I am getting some DRC violations in my design regarding the I/O pads:
1. NS width for NMOS drain >= ...
2. NS width for drain >= ...
Any idea what should i check? or how can i fix this?
Thanks.
I am getting some DRC violations in my design regarding the I/O pads:
1. NS width for NMOS drain >= ...
2. NS width for drain >= ...
Any idea what should i check? or how can i fix this?
Thanks.