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Assertions possible in Specman

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askrkrao

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assertion using specman

Please help me out
 

assertion specman

Mostly we have assertions in SYstem verilog and verilog HDL.
THere is no assertions in Specman
 

specman assertions

answer is yes and no.

use temporal expression to do that.


assertions are two kind
(static - without simulation ) -which is not possible in specman
and
(dynamic - while simulation ) - which is very much possible through temporal checks

/.ue
 
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