ASIC Processor for electronic ticket issuing machine

[lakshakumara]

Im university student and following processor design course
I've to design ASIC for electronic ticket issuing machine
I feel trouble for these,
1. how to draw block diagram for this processor
2. what are necessaory component inside the processor
3. VHDL code for Xilinx 13.2

already I have design a ISA like,

Instruction Set
OP-Code (hex) Mnemonic Meaning
0000 0000 FROMSEC Load starting section to registers
0000 0001 TOSEC Load destination section to register
0000 0010 CALPRICE Calculate the price
0000 0011 LCDOUT Print on display
0000 0100 PRINT Send to printer
0000 0101 WAIT Wait till Ok button is pressed
0000 0110 SEARCH Search from look up table
0000 0111 ADD Addition 16 bit value
0000 1000 SUB subtraction
0000 1001 INC increment
0000 1010 CLEARREG Clear register
0000 1011 PADULT No of adult passengers
0000 1100 PCHILD No of child passengers
0000 1101 PAMOUNT Passenger Amount
0000 1110 WRITE Write to look up table
0000 1111 SAVE Store in memory
0001 0000 BALANCE Balance payment if positive if negative not set
0001 0001 LOOP Loop section
0001 0010 JUMP Jump to Label

Sample Program for issuing a ticket for a passenger I used a look up table for locations, price and so on data.

Main:
FROMSEC, r1 //read start section and set register R1
TOSEC,r2 // read destination and set Register R2
PADULT ,r3 // read no of adult passengers and set register R3
PCHILD ,r4 //read no of child passengers and set register R4
CALPRICE,r5 // calculate total amount and set register R5
PAMOUNT,r6 //read passenger giving money and set register R6
BALANCE,r7 // Balance pay
PRINT // print a ticket
JUMP MAIN

plzzzzzzzzzz help me to
1. how to draw block diagram for this processor
2. what are necessaory component inside the processor
3. VHDL code for Xilinx 13.2

best reguard,
Lakshakkumara.