ARITH_BITLEN rule of Lint (VLSI)

[Lakshmi Manasa]

ARITH_BITLEN: This rule checks for inconsistent bitlengths of an arithmetic operator. A violation is reported when the bitlengths of arithmetic operands are not the same.
Case1: in1 is of 3-bit and in2 is of 4-bit. I understand when there'll be violation of this rule for in1+in2.
Case2: in1 and in2 are of 5-bit and sum = (in1/5'd2+in2/5'd4). Lint doesn't report with this scenario. With the denominator (5'd2 for in1 and 5'd4 for in2), the bit width will be different for 2 operands. Why is lint not able to report this? This is also a static check right?

 

[ThisIsNotSam]

I can't really understand your Case2, but it looks like you adding constants of fixed sizes. What were you expecting to be the error/warning here?

 

[FvM]

Not sure what ARITH_BITLEN rule specifies. Addition of operands with different bit length is generally allowed in Verilog, expression bitlength is max(length op1, length op2).

 

[Lakshmi Manasa]

Addition of different bit length is allowed but lint throws a warning in case 1. But in case 2, when we divide in1 with 5'd2 and in2 with 5'd4 then the width of in1[4:0]/5'd2 (i.e., 4 bits are enough for resultant when we right shift the in1 by a bit right?) is different from width of in2[4:0]/5'd4 (i.e., 3 bits are enough for resultant when we right shift in2 by 2 bits). Why isn't lint giving warning when we add 4-bit operand with 3-bit operand?

Also, as @ThisIsNotSam mentioned, if we waive this rule do we've any concern? (with respect to the extended bits and any unintentional errors)?