Ebrahim Songhori
Newbie level 3
Hi,
I write a custom library for synopsys design vision which only consists of XOR, NOR, and IV (inverter or NOT). My plan is to synthesize a combinational logic such that the resulting netlist has minimum number of NOR gates. I write the library as flows:
Here, I have removed timing and input capacitor for the sake of saving space. I set area of NOR to 1000 and XOR and IV to 1 so I can use area optimization to replace unnecessary NORs with XOR and IV. I compile my combinational logic using set_max_area 0 and then compile_ultra -exact_map -no_design_rule -area_high_effort_script.
Problem is no matter I set NOR area to 1 or 1000, I will get the same result (# of NOR). It seems the area optimization trick doesn't work. Do you know why? How can I minimized NOR?
Thanks
I write a custom library for synopsys design vision which only consists of XOR, NOR, and IV (inverter or NOT). My plan is to synthesize a combinational logic such that the resulting netlist has minimum number of NOR gates. I write the library as flows:
Code:
library(and_or_xor) {
cell(NOR) {
area : 1000;
pin(A) {
direction : input;
}
pin(B) {
direction : input;
}
pin(Z) {
direction : output;
function : "(A+B)'";
}
}
cell(IV) {
area : 1;
pin(A) {
direction : input;
}
pin(Z) {
direction : output;
function : "A'";
}
}
cell(XOR) {
area : 1;
pin(A) {
direction : input;
}
pin(B) {
direction : input;
}
pin(Z) {
direction : output;
function : "A^B";
}
}
}Here, I have removed timing and input capacitor for the sake of saving space. I set area of NOR to 1000 and XOR and IV to 1 so I can use area optimization to replace unnecessary NORs with XOR and IV. I compile my combinational logic using set_max_area 0 and then compile_ultra -exact_map -no_design_rule -area_high_effort_script.
Problem is no matter I set NOR area to 1 or 1000, I will get the same result (# of NOR). It seems the area optimization trick doesn't work. Do you know why? How can I minimized NOR?
Thanks