ravindra kalla
Junior Member level 2
help!!!! on architecture
hi,
i am making a architecture in which i am using processing element which used to calculate sum of absolute difference (SAD)of two matrics of size 4*4.In one case i have to calculate SAD of 9 matrics and in other case i have to calculate SAD of 5 matrics.So if i am using 9 processing element in parallel then in second case when i have to calculate SAD of 5 matrics then 4 processing element is remaining idle .IS
thier any solution so that i can utilise hardware 100 percent for this process.
please give your valuable suggetion.
thanx
Added after 7 minutes:
Note:SAD of 9 matrics means thier is 18 matrics and each processing element is calculating SAD of two matrics,similarly for 5 matrics means thier is 10 matrics and each proceesing element is calculating SAD of two matrics.
reply soon
thanx
hi,
i am making a architecture in which i am using processing element which used to calculate sum of absolute difference (SAD)of two matrics of size 4*4.In one case i have to calculate SAD of 9 matrics and in other case i have to calculate SAD of 5 matrics.So if i am using 9 processing element in parallel then in second case when i have to calculate SAD of 5 matrics then 4 processing element is remaining idle .IS
thier any solution so that i can utilise hardware 100 percent for this process.
please give your valuable suggetion.
thanx
Added after 7 minutes:
Note:SAD of 9 matrics means thier is 18 matrics and each processing element is calculating SAD of two matrics,similarly for 5 matrics means thier is 10 matrics and each proceesing element is calculating SAD of two matrics.
reply soon
thanx