I need to cut and reconnect a wire in my digital logic.
the distance is short, just about couple um.
However, it has to reach all the way down to metal 1.
Does anybody know what the yield rate is for doing fib on the lowest metal layer?
Can anybody recommend a good company for this task?
Yield rate: depends on a lot of parameters which you didn't care to mention: process size, # of metal layers, size of end points, ...
An example: we got 8 good ones out of 10, with 3 interruptions and new connections (on each chip) on min. size end points in M2 & M3 of a 5M 0.18µm design (4 years ago, German semicond. institute).
I need to cut and reconnect a wire in my digital logic.
the distance is short, just about couple um.
However, it has to reach all the way down to metal 1.
Does anybody know what the yield rate is for doing fib on the lowest metal layer?
Can anybody recommend a good company for this task?
Ask around for "flip chip FIB". There are companies that can FIB in from the back (substrate) side which would get you to metal-1 without disturbing the metal above it (which probably carry power, clock, etc).
Of course this will utterly destroy any transistors underneath the metal-1 you're trying to access.
Last time I asked about this I seem to remember the figure 5um being kicked around for the region of substrate destruction.
do not know. but, if you deals with the vendor. get the technical support from that vendor. tell them a bit about your process. they have a good idea about the yield. if it is too difficult, some time they will try and some time they will just say no.