any synthesis tool could convert rtl code to purely gate ?

[asueee0]

any synthesis tool could convert rtl code to purely gate level implementation?

 

[gliss]

Re: any synthesis tool could convert rtl code to purely gate

Try Magma Blast
**broken link removed**

 

[asueee0]

Re: any synthesis tool could convert rtl code to purely gate

but it seems that there is no demo version to download unlike modelsim and synplicity.

 

[SkyHigh]

Re: any synthesis tool could convert rtl code to purely gate

Logic synthesis tool is used to synthsized RTL description into gate-level netlist. Such tools can be Synopsys Design Compiler or Design Vision, or MentorGraphics LeonardoSpectrum.
So if you want RTL -> Gate, what else can it be besides using a logic synthesis tool?

 

[asueee0]

Re: any synthesis tool could convert rtl code to purely gate

HI,SkyHigh,

I heard of most of these tools, and I am using synplify pro, however, it implements the rtl into something that are device based (from all kinds of fpga venders) rather than in primative gate level. For pratical engineers, that is of course what they want, but for hdl beginner like me, i want to see how it looks like in purely gate level, that is why I asked for such synthese tool. so anyone gives some clue? thanks.

 

[Beetroots]

Re: any synthesis tool could convert rtl code to purely gate

Just look at the RTL view in Synplicity, it'll show your design at a generic RTL level (rather than the device LUT level).

 

[SkyHigh]

Re: any synthesis tool could convert rtl code to purely gate

As far as I know because I have used them before, LeornardoSpectrum and Design Compiler/Vision has multiple viewing levels, from chip or system level, component level, down to gate level where you can see the interconnections of countless number of gates from input to output. It will also highlight the critical path! I am sure other competitive tools like Synplicity has it too. I heard of Synplicity because one of my friends used it for FPGA-based project for an automative system control using CAN.

 

[louisnells]

Re: any synthesis tool could convert rtl code to purely gate

Try XILINX WebPack or ModelSim.

any synthesis tool could convert rtl code to purely gate level implementation?