hot_snow
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Hello,
I'm designing a Zigbee module with a TI antenna design.
I make the Antenna with the fill copper option of AD10. Well, when I added a two pads to the fill copper of the antenna I found two errors violations:
1- Clearance Constraint (Collision < 0.2 mm) Between Fill on BottomLayer And Pad on BottomLayer.
2-Short-Circuit Constraint Between Fill on BottomLayer And Pad on BottomLayer.
Can these errors make a problom of signal transfer in my PCB?
One other question: I found in the layout design of TI that their own PCB contains thru-holes vias and blind vias (L1-L2 and L3-L4).
Have I to use blind vias in my design? or I can only use thru-holes ones?
Thanks,
I'm designing a Zigbee module with a TI antenna design.
I make the Antenna with the fill copper option of AD10. Well, when I added a two pads to the fill copper of the antenna I found two errors violations:
1- Clearance Constraint (Collision < 0.2 mm) Between Fill on BottomLayer And Pad on BottomLayer.
2-Short-Circuit Constraint Between Fill on BottomLayer And Pad on BottomLayer.
Can these errors make a problom of signal transfer in my PCB?
One other question: I found in the layout design of TI that their own PCB contains thru-holes vias and blind vias (L1-L2 and L3-L4).
Have I to use blind vias in my design? or I can only use thru-holes ones?
Thanks,