Welcome to our site! EDAboard.com is an international Electronics Discussion Forum focused on EDA software, circuits, schematics, books, theory, papers, asic, pld, 8051, DSP, Network, RF, Analog Design, PCB, Service Manuals... and a whole lot more! To participate you need to register. Registration is free. Click here to register now.
Can we have an idea to build an analog differentiator where dt is in minutes. Is it actually possible?. My process is very slow. Wanted to avoid processor in this regard.
and don´t use a electrolytics because of it´s leakage current. And I don´t recommend to use ceramics becuase of their unlinearity.
Thus I´d use a foil capacitor, a good OPAMP, and a PCB layout maybe with guard ring to minimize (over years.. with humidity, dirt and whatever may come...) the leakage current..
It will work. But If I had to do it, I´d use a microcontroller.
In detail it depends on the precision, cost, effort...
Initially I thought of using micros, but my customer wants a software validation report which makes it burdensome. Therefore planning for all hardware. Any proven reference design available? And FvM, you mean 20sec and not 2 Minutes?
Please help me to arrive at BW specifications. The input changes by around 10mV/min (max). Input waveform is more like a ramp. With these inputs only provided, let me know how to arrive at specs that you just mentioned in post #6
Here is a gross sim of a long term differentiator. Uses the ap note to get
at the performance, and part values, you want. In addition use ap note
NI input R to minimize offsets, etc.. -
In time discrete signal processing (e.g. in FPGA), differentiation is replaced by discrete difference of adjacent samples.
dx/dt = (x(n+1) - x( n)/Tsamp
I want to implement the difference equations below to design an accumulator and a differentiator: Accumulator: y[n] = y[n-1] + x[n], where y[n]is the n'th output and x[n] is n'th the input.
Background: I'm sampling the current through a capacitor. The signal of interest is the voltage across the capacitor. I will digitally integrate the current measurement to obtain the voltage. Que...
I have just analyzed the discrete version of the differentiator. Strangely, it appears that if x[n] and x(n-1) are displaced by one minute, there is a likelihood of missing intermittent variations of the signal. Like a spike superimposed on a ramp for small duration. Analog version reflects the change. So I guess we may require many more intermittent samples and not just two as indicated in #10.
In a sampled data system, the sampling rate should fulfill the Nyquist criterion. Respectively, if the sampling rate is 1/min, there should be no intermittent signal variations, or the sample rate has been selected inadequately.
A sampling rate decimation can take place in the data path if appropriate, but it would involve a decimation filter.
Seriously, I can't imagine that it's reasonable to use such a low sampling rate for your data, whatever the signal bandwidth is. As explained before, the sampling rate acts as a scaling factor in the differentiator, but you are free to implement a differentiator time constant of your choice independent of the sampling rate.
Ok. In my case , if I take 1 second as a sampling time, then I will have 60 samples. So in effect the output will me x[60]-x[1], but the values should slide down , I mean present value should be copied the past variables and so on, like x[59]=x[60] .... x[2]=x[1] etc after one minute duration. Is this implementation correct?. In that case I am expecting spike duration for 2 second and 1 second sampling time should meet the Nyquist criteria.
So you mean that only adjacent samples would suffice but multiplied by scaling factor. Theoretically if I increase sampling rate say 10Hz would the scaling factor become 600?. Also it appears from #17 that there is no wait time for 60 seconds. it is almost instantaneous.
Some time ago I was studying various digital differentiating networks, i.e., networks that approximate the process of taking the derivative of a discrete time-domain sequence. By
Yes I checked it out on rick lyons article. However after some simulations, i discovered that in analog version equation for a differentiator, RC dvin/dt, the factor RC denotes the time duration when the slope needs to be estimated. High frequency will be let through as it is a high pass filter. But I am afraid that sampled differentiator system tends to block high frequency signals if the sampling intervals are large enough. This proves the point that historical samples are necessary for appropriate computation of a derivative. I was unable to get any similar responses with analog vs digital ones given the input stimulus.
This site uses cookies to help personalise content, tailor your experience and to keep you logged in if you register.
By continuing to use this site, you are consenting to our use of cookies.