May 22, 2019 #1 Y yyy963741tw Newbie level 4 Joined May 22, 2019 Messages 5 Helped 0 Reputation 0 Reaction score 0 Trophy points 1 Activity points 35 I simulated the example of veriloga tutorial workshop but with error message that : Error detected by hpeesofsim during netlist flattening. `psfetv1' is an instance of an undefined model `psfetv'. How can i solve it?
I simulated the example of veriloga tutorial workshop but with error message that : Error detected by hpeesofsim during netlist flattening. `psfetv1' is an instance of an undefined model `psfetv'. How can i solve it?
May 22, 2019 #2 pancho_hideboo Advanced Member level 5 Joined Oct 21, 2006 Messages 2,847 Helped 767 Reputation 1,536 Reaction score 733 Trophy points 1,393 Location Real Homeless Activity points 17,490 ADS is not an Analog Design System. It is an Advanced Design System. Show me netlist. Simply you don’t include model definition which is described by Verilog-A or ADSsim language. Last edited: May 22, 2019
ADS is not an Analog Design System. It is an Advanced Design System. Show me netlist. Simply you don’t include model definition which is described by Verilog-A or ADSsim language.
May 23, 2019 #3 Y yyy963741tw Newbie level 4 Joined May 22, 2019 Messages 5 Helped 0 Reputation 0 Reaction score 0 Trophy points 1 Activity points 35 I am sorry to mistype the word. how could i inculde th e model this tutorial example workspace should not already fininshed?
I am sorry to mistype the word. how could i inculde th e model this tutorial example workspace should not already fininshed?
May 23, 2019 #4 pancho_hideboo Advanced Member level 5 Joined Oct 21, 2006 Messages 2,847 Helped 767 Reputation 1,536 Reaction score 733 Trophy points 1,393 Location Real Homeless Activity points 17,490 yyy963741tw said: how could i inculde th e model Click to expand... Place model definition component in schematic. yyy963741tw said: this tutorial example workspace should not already fininshed? Click to expand... I can not understand what you want to mean at all. Write sentences with correct grammer.
yyy963741tw said: how could i inculde th e model Click to expand... Place model definition component in schematic. yyy963741tw said: this tutorial example workspace should not already fininshed? Click to expand... I can not understand what you want to mean at all. Write sentences with correct grammer.
May 23, 2019 #5 Y yyy963741tw Newbie level 4 Joined May 22, 2019 Messages 5 Helped 0 Reputation 0 Reaction score 0 Trophy points 1 Activity points 35 so i should copy the veriloga code into netlist? I mean this work provided by program tutorial . It Should be able to simulate normally . But it can't
so i should copy the veriloga code into netlist? I mean this work provided by program tutorial . It Should be able to simulate normally . But it can't
May 23, 2019 #6 V volker@muehlhaus Advanced Member level 6 Joined Apr 11, 2014 Messages 3,187 Helped 1,070 Reputation 2,142 Reaction score 1,136 Trophy points 1,393 Activity points 20,246 Check the schematic in your tutorial. It seems that you missed to add some model/library include block which tells ADS about the model details.
Check the schematic in your tutorial. It seems that you missed to add some model/library include block which tells ADS about the model details.