Re: ADC problem
ADC noise depends on many parameters, e. g. ADC clock, possible usage of the ATMega "noise canceler" (AD conversion in CPU sleep mode), reference voltage and hardware design. Does Meshnetics give the +/- 2LSB specification? I doubt, if it is realistic with 1.2 Vref anyway. If it's a trustworthy manufacture spec, the problem should be expected in a noisy input signal. The ADC is sampling the input voltage, it's aware a lot of noise you won't see with a multimeter! In this case, the suggested RC filter should help.
Usual software noise reduction technique is digital filtering by low pass or averaging of samples.