ADC digital data out is decreased by 1

[Armia Wagdy]

I've been working in an ADC project on ATmega 32
my ADC is 10-bit resolution, Vref = 2.56V (internally
from this information I can conclude that step size = 2.56/1024 = 2.5mV

then, if the input voltage is 2.5 volt, the Digital data output must be 2.5V /2.5mV = 1000 = 0b1111101000

I've made that code and make a simulation in proteus, but when the input voltage was 2.5V, the output was 999 (decimal) = 0b1111100111 instead of 1000 why??!!

Note: the digital data output is right adjusted

that's my code:

#include <avr/io.h>

int main(void)
{
	DDRB = 0xFF;
	DDRD = 0xFF;
	DDRA = 0;
	ADCSRA = 0x87;			//ADC enable, clk/128
	ADMUX = 0xC0;			//Internal vref, single ended ADC0
	while(1){
	ADCSRA |=(1<<ADSC);		//start conversion
	while(ADCSRA & (1<<ADIF) == 0);
	PORTD = ADCL;
	PORTB = ADCH;
	}	
	return 0;
}

and this is the output of the proteus simulation

 

[Vengateswaran]

This deviation is not a matter of concern because your source will have some tolerance value.

 

[keith1200rs]

An input of 0V to 2.5mV will give a reading of zero. 2.4975V to 2.5V will give 999. To get 1000 you need 2.5V to 2.5025V.

Keith

 

[bigdogguru]

As Keith pointed out, unlike DACs which ideally output a single precise voltage value for a particular each binary coded input, ADCs intentionally represent a range of analog input values with each binary coded output value.

Ideally the this range/accuracy is one Least Significant Bit (LSB), however in reality this range can vary depending on input value, ADC device, etc.

In the case of the ATMEL ATmega32A, this range/accuracy is spec'd at +/- 2 LSB, or if using the internal voltage reference at 10-bit resolution, +/- 5 mV.

The above issue can also be a source of confusion, as the calculated representive range of a unipolar ADC is NOT 0 to Vref, instead it is 0 to Vref * (2ⁿ-1)/2ⁿ, or in other words 0 to Vref-LSB, therefore at full scale the maximum calucated value will be less than Vref, in this case 2.56V * 1023/1024 or 2.56V - 2.5mV or 2.5575V.

Some of the additional sources of error are a spec'd Integral Non-Linearity of 0.5 LSB for the ATmega32A, Gain Error, in the case of SAR ADCs in general insufficient sample and hold cap charge time and a source output impedance which exceeds the ADCs recommend value.

How many of these factors the simulation takes into account is difficult to say with certainty as I rarely use Proteus these days.


However, in real world hardware the above mentioned factors and others can play a significant role in any design.


BigDog