ADC diff mode --> common mode

[voho]

Hi all,

I use an adc ADS5440 with 13bits output LVDS (Do-D12& Do/ - D12/) pair connected in FPGA.

It s is possible and what is happening if i use the output of this adc ADC ADS5440 in common mode (Do-D12) connected in FPGA. In UCF file i use only the pin Do-->D12 assigned during synthesis on the xilinx tool.




Regards

 

[karesz]

Hi,
I would route it as Diff. LVDS-BUS, terminate it properly & feed shortly as asymmetric (your common mode) signals into the FPGA
What I dont no; has an FPGA a so small sensing range that works with_HALF OF_ LVDS signals!? Has it some Line Receiver inputs for that?
K.