T
treez
Guest
Hello,
The Active clamp forward can certainly be arranged to have zero switch_on switching loss (by suitable sizing of the leakage inductance).
Since at switch off, much of the FET drain current is diverted into the clamp capacitor, (ie rather than it going through the drain_source of the FET) can we also say that the switch_off switching losses are significantly reduced?
(ie reduced over and above what the switching losses are for a two transistor forward?)
LTspice sim of active clamp forward attached
The Active clamp forward can certainly be arranged to have zero switch_on switching loss (by suitable sizing of the leakage inductance).
Since at switch off, much of the FET drain current is diverted into the clamp capacitor, (ie rather than it going through the drain_source of the FET) can we also say that the switch_off switching losses are significantly reduced?
(ie reduced over and above what the switching losses are for a two transistor forward?)
LTspice sim of active clamp forward attached