About the nmos on a deep-nwell in TSMC 0.18um process...

[cqmyg5]

I find there're a deep-nwell nmos in TSMC 0.18u MS process, could we consider this deep-nwell nmos an isolated nmos? so it has no body-effect when its substrate connects to its source?

 

[ambreesh]

Yes, a DNW would provide you with A NMOS that could have its source and bulk at same potential.
I would still suggest use it in dire necessity, the silicon area it consumes is huge.
And they are a pain for the layout engineers if area reduction has to be done