Welcome to EDAboard.com

Welcome to our site! EDAboard.com is an international Electronics Discussion Forum focused on EDA software, circuits, schematics, books, theory, papers, asic, pld, 8051, DSP, Network, RF, Analog Design, PCB, Service Manuals... and a whole lot more! To participate you need to register. Registration is free. Click here to register now.

About the nmos on a deep-nwell in TSMC 0.18um process...

Status
Not open for further replies.

cqmyg5

Advanced Member level 4
Joined
Oct 21, 2003
Messages
118
Helped
3
Reputation
6
Reaction score
2
Trophy points
1,298
Activity points
963
I find there're a deep-nwell nmos in TSMC 0.18u MS process, could we consider this deep-nwell nmos an isolated nmos? so it has no body-effect when its substrate connects to its source?
 

ambreesh

Full Member level 5
Joined
Feb 21, 2005
Messages
319
Helped
21
Reputation
42
Reaction score
4
Trophy points
1,298
Activity points
4,347
Yes, a DNW would provide you with A NMOS that could have its source and bulk at same potential.
I would still suggest use it in dire necessity, the silicon area it consumes is huge.
And they are a pain for the layout engineers if area reduction has to be done
 

Status
Not open for further replies.

Part and Inventory Search

Welcome to EDABoard.com

Sponsor

Top