Apr 14, 2005 #1 M Markie Junior Member level 2 Joined Nov 16, 2004 Messages 24 Helped 0 Reputation 0 Reaction score 0 Trophy points 1,281 Activity points 215 I want to know what the goal to add ESR in simulation and what ESR will perfect? We use a version of LDO "117" in our design, but if we don't add the cap on output term, it will wave. If we don't want to add the input and output capacitor, we should use the chip of what PSRR? does this pheno is associated with the PSRR? Your help will be very sincere.
I want to know what the goal to add ESR in simulation and what ESR will perfect? We use a version of LDO "117" in our design, but if we don't add the cap on output term, it will wave. If we don't want to add the input and output capacitor, we should use the chip of what PSRR? does this pheno is associated with the PSRR? Your help will be very sincere.
Apr 14, 2005 #2 L lunren Member level 4 Joined Jun 19, 2003 Messages 71 Helped 3 Reputation 6 Reaction score 2 Trophy points 1,288 Activity points 661 Normally, we add a large capacitance with ESR at the output of LDO to help the circuit be stable. This pheno is just a frequency compenstion issue.
Normally, we add a large capacitance with ESR at the output of LDO to help the circuit be stable. This pheno is just a frequency compenstion issue.
Apr 15, 2005 #3 A ambreesh Full Member level 5 Joined Feb 21, 2005 Messages 319 Helped 21 Reputation 42 Reaction score 4 Trophy points 1,298 Activity points 4,347 Go to GATECH website look for Rincon mora and his publications. His PhD thesis is freely avilable.