about switched capacitor circuit design

Status
Not open for further replies.

jackieyoung

Newbie level 1
Joined
Dec 28, 2004
Messages
1
Helped
0
Reputation
0
Reaction score
0
Trophy points
1,281
Activity points
11
Hi,all
I have some problems about SC circuit design.Please give me some advices.
When i design a opamp used in a SC circuit,is it necessary to make sure its common mode input voltage equal common output volatge? I think it may not necessary but how can i decide the next input stage common mode voltage if i wish to use the same op ?
Abother problem is that how can i define a opamp input common mode voltage using a capacitor feedback from output,like a SC integrator? I find using a capactor for negative feedback can fail.The opamp acts as open loop,not closed loop.Is it something wrong?? I use a ideal opamp in hsipce.
I think the ground sign on the text book means AC ground.Should I add a common mode source to the input to bias the opamp??
Thanks
 


It is not necessary to make input common mode input voltage equal to output. However, the design would be simplified if they are same. The input common mode voltage can also been determined using CMFB technique such like the output common mode feedback. Reference:**broken link removed**

You can utilize large resistor parallel with capacitors to simulate the common feedback in hspice. Good Luck!
 

The reference link got some problems. Does it need password for access ?
 

Status
Not open for further replies.

Similar threads

Cookies are required to use this site. You must accept them to continue using the site. Learn more…