That is the conventional way (putting decap between vdd and ground)to reduce the noise on the digital circuit. You had a question about the necessity of decoupling cap.
I would say that depends on:
1.the rise and fall time of you digital signals increases
2. The value supply and ground inductance.
3. How big is your digital circuit.
4. Does it communicate with a sensitive analog circuit.
5. What is THE nml and nmh of your inverters.
As an example, let say the vdd has 2 nh inductance and the rise time of your signal is 100 ps and let say the load of inverter is 50 fF and vdd is 2 volts.
The transient current through load capacitor is cl*dv/dt=0.05*2/100=1mA within 100ps. Therefore the voltage drop across inductor is L*di/dt=2*0.001/0.1=20mv. If you have 20 of these inverters working at the same time, the voltage drop will be ~0.4 which might reduce considerably the nml and nmh of your circuit.
therefore I advice you to use decap.