about gate array place and route?

[shrbht]

the software for gate array place and route ?
gate ensemble? AstroGA?
anyone know ?
thank u

 

[gliss]

You can use Cadence Encounter

 

[MarcS]

AstroGA is not a supported product

Cadence Encounter is probably your best bet

Magma BlastFusion claims to support 'structured ASIC' design which is a modern form of gate array, but I don't know much about their capability or if Talus still supports it.

The other solution is to talk to your silicon vendor and ask them what tool they recommend

 

[shrbht]

has anyone used gate ensemble for gate array place and route?

 

[MarcS]

Gate Ensemble is an older Cadence product from before they acquired Silicon Perspectives and the Encounter platform.

It is a dedicated gate array tool (unlike Encounter which is basically a cell based tool). Gate Ensemble is a fine gate array tool, but I don't know if Cadence still sells or supports it. Check their website or call their sales office.

 

[shrbht]

Does SOC Encounter support the cell library which silicon Ensemble support?
such as 0.35um cmos cell library. thank u

 

[MarcS]

Yes, the library files (LEF & DEF) are upwardly compatible