about bit overflow in the integrator portion of cic interpolation filter.

[kannan2590]

i am attaching one pdf file based on cic filter.In the bitgrowth section the author has mentioned about the increase in the bits at the output stage .Suppose if i am writing a vhdl code for cic interpolation stage for example let differential delay M=1, Interpolation factor R=8,Input bit size be 23 and number of comb sections and integrator sections be N=9.Then how the output bit size change for each comb section.Can anybody explain me with the above mentioned parameters?

 

[FvM]

Then how the output bit size change for each comb section.

A detailed calculation can be found in Hogenauer's classical paper. It says, that the interpolator comb regsisters grow one bit per stage,