surreyian
Member level 3
Hello,
In Razavi's book, design of analog CMOS integrated circuit.
chapter 3, pg 56/57
Its about a cs stage (M1) with diode connected PMOS (M2). input is at cs stage. output is taken at the D of CS stage
its gain is given as gm1/gm2. i understand this part.
then it further shows that
1)gain = VGS2-VTH2/VGS1-VTH1
gain will be large if u set M1 overdrive small and M2 overdrive big.
and there is another equation
2) gain= (k(w/l)(vgs1-vth1))/((k(w/l)(vgs2-vth2))
this equation shows opposite trends. how can I explain this?
i'm a bit confused about which equation to use.
the current through the circuit is the same. with changing W/L. increase vin, increase the overdrive of cs stage, cause vout to go low, which also increase the overdrive of M2(diode connect PMOS). how can we increase the overdrive of one MOS and not the others?
i will be grateful if someone can go through this with me.
In Razavi's book, design of analog CMOS integrated circuit.
chapter 3, pg 56/57
Its about a cs stage (M1) with diode connected PMOS (M2). input is at cs stage. output is taken at the D of CS stage
its gain is given as gm1/gm2. i understand this part.
then it further shows that
1)gain = VGS2-VTH2/VGS1-VTH1
gain will be large if u set M1 overdrive small and M2 overdrive big.
and there is another equation
2) gain= (k(w/l)(vgs1-vth1))/((k(w/l)(vgs2-vth2))
this equation shows opposite trends. how can I explain this?
i'm a bit confused about which equation to use.
the current through the circuit is the same. with changing W/L. increase vin, increase the overdrive of cs stage, cause vout to go low, which also increase the overdrive of M2(diode connect PMOS). how can we increase the overdrive of one MOS and not the others?
i will be grateful if someone can go through this with me.