variable frequency is actually considered PFM, not PWM - your limiting case is 99.9% duty cycle at fmax..
no need for DDFS here, since you are only generating a clock of variable frequency. You can probably use the core circuitry of the DDFS to supply a variable frequency clock to a little PWM system. This may be hard to stabilize at high power output, since the subharmonic problems inherent to PWM will be magnified due to the additional delay in your frequency compensation circuitry.
Try starting with a minimum-off-time PFM, then build PWM into that if it cannot satisfy your requirements.