8bit thermodac in verilogA

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Hey,

I`d like to programm a 8bit DAC with thermometercoded input signal in VerilogA.
Because there are quite a lot input bits to consider (255), I wanted to use the generate comand.
In my simulation with spectre it seams that I never reaching the loop.
What am I doing wrong there?

PHP:
`include "discipline.h"
`include "constants.h"
`define Nin 255

module DAC8bit(Vout,in, VDD, VSS, Vclk);
output Vout;
input [1:`Nin] in;
input VDD;
input VSS;
input Vclk;
electrical [1:`Nin] in;  
electrical Vout, VDD, VSS;
electrical Vclk;

parameter real trise = 0 from [0:inf);
parameter real tfall = 0 from [0:inf);
parameter real vrefp =2;
parameter real vrefm = -2;
parameter real vtrans_clk     = 0;
   real aout;
   real LSB;	
   real bit [1:`Nin];
   integer ii; 
  
  analog begin
         @(initial_step) begin
 	  LSB = (vrefp-vrefm) / `Nin;
	  aout = vrefm;
         end
         
	@(cross(V(Vclk)-vtrans_clk,1)) begin 
	 generate i (1,`Nin) begin 
	 if (V(in[i])>vtrans_clk) begin
		bit[i] = LSB;
       	 end else begin
		bit[i] = 0;
	end
	end

         for (ii=1; ii<=`Nin; ii=ii+1)
	 aout = vrefm+bit[ii];
	end
     
       	  V(Vout) <+ transition( aout, 0, trise, tfall ); 
      

   end
endmodule

`undef Nin
 

A good way to debug is to display message as to what code is doing and where it is.
I open an file and write message to it. you can use $strobe/ $display to see when you reach the generate statement and if it goes inside it.
 

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