can u help me? I have a problem with digital design as following:
"build a 8 bit up/down counter with I/O: clk, set, reset, data_in, data_out.
use VHDL language, build the testbench to emulate and verify this counter."
thanks alot!
That won't be that difficult...
An hour maximum, and then that would be done - the great thing is that there are IC's made for this already, so you can just take a look at their functioning diagram!
I would gladly help you getting started.
I suspect the first problem is "how"? you have a "set" and a "reset" signal, but nothing that would seem to tell the counter to count up vs count down.
That won't be that difficult...
An hour maximum, and then that would be done - the great thing is that there are IC's made for this already, so you can just take a look at their functioning diagram!
I would gladly help you getting started.
I'm a beginner in digital design, my problem is to design the diagram in IC's as you said. could you help me to solve this problem. You can show the hints to do that. thank a lot.
I'm a beginner in digital design, my problem is to design the diagram in IC's as you said. could you help me to solve this problem. You can show the hints to do that. thank a lot.
Yeah I see. On my blog you can see a schematic about an 8-bit Up counter, which resets when it comes to 255.
This is made by simple Flip-Flops, but can't unfortunately be changed to up/down counting. **broken link removed**
you read the basic about the counter in digital logic and computer design author M.MORRIS MANO. Than after do the counter program because it necessary you know about how to counter work.
Yeah I see. On my blog you can see a schematic about an 8-bit Up counter, which resets when it comes to 255.
This is made by simple Flip-Flops, but can't unfortunately be changed to up/down counting. **broken link removed**