If you need to maintain the same frequency as the input signal you have to generate a short pulse at both edges (see picture below) and then divide this "new" square wave by 2 using any Flip-Flop in "divide-by-2" configuration ..
I think that you are wrong.
With your solution you'll get the same duty cycle because the output will change at the same moment that the output does.
If you need the same frequency you'll have to use a digital PLL circuit. If not, with the "divide-by-2" circuit you'll get 1/2 of the input signal frequency.
The first block (with XOR gate) multiplies the input frequency by 2 (with who-cares duty-ratio) and the second block (with D-flip-flop) divides frequency by 2 with perfect 50% duty-ratio, where exactly do you see problems?
The first block (with XOR gate) multiplies the input frequency by 2 (with who-cares duty-ratio) and the second block (with D-flip-flop) divides frequency by 2 with perfect 50% duty-ratio, where exactly do you see problems?
Angelote is correct. The duty cycle of the output will be identical to the duty cycle of the input. The output will only be 50% if the input is 50%.
Below is a modification of your edge detector that illustrates this.