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So if I'm using Arria V for example - I'll have to do it with logic ?Saturation is a DSP hardware feature of some FPGA families, e.g. Stratix II - IV. It can be only used in mult_add IP if the hardware supports it.
is ieee.fixed_pkg well supported for synthesis ?
Simple as it is - it'll almost certainly be slower than the speed of the hardened DSP silicon.Otherwise rounding and saturation is a simple operation.
Round = +0.5 and chop the LSBs off.
Saturate is just some compares and a mux.
Yes, you can write functions to perform the operations. The convenience of fixed_pkg is that is is redefining the arithmetic operators. Altera Quartus has ieee.fixed_pkg supported with VHDL 2008 since version 15.Otherwise rounding and saturation is a simple operation.
Round = +0.5 and chop the LSBs off.
Saturate is just some compares and a mux.