I am planning to use two units of this Octal buffer 3-state IC for my next design: 74HC367.
I want to use two 74HC467 in parallel interconnecting their outputs (Because they are 3-state) and making a control of the ouput enable pins throught an FPGA.
My question is if I need to place pull-up/down for every output of the buffer or with the basic wire interconnection is enough?
Pull-up /pull-down resistors are only required if you need the bus to be in a known state when/if all the tri-state drivers are in the high-impedance state at the same time.
a common rule says: never leave inputs floating. Therefore I recommend to use pullups. (Or bus keepers, if you have)
Especially when you have a battery powered device and want long battery life.
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Essential are the pullups in the OE lines. During power up, when the FPGA outputs are not yet valid, you have to avoid accidental enabling the outputs.
A short on 8 data lines may cause your power supply to fail and/or damage the driver ICs.